| Issue | Solution | |-------|----------| | Model not converging | Add realistic ESR to caps; use Gmin stepping or cshunt=1pF | | Slow simulation | Reduce max timestep to 1/100 of switching period; use .ic for initial conditions | | Output not switching | Check Vcc > 7V; OUTPUT CONTROL pin 13 = GND for single-ended | | Error Amp oscillation | Add compensation network (type II or III) from pin 3 to GND |
Now let’s simulate a useful circuit: a . Tl494 Ltspice
